Molex, AMCC demonstrate 10 Gbits/sec 10GBase-KR
At Electronica 2008, Molex (www.molex.com) and Applied Micro Circuits Corp. (AMCC; www.amcc.com) demonstrated a data transmission signal at 10.3 Gbits/sec over 1 meter of copper backplane traces. The signal was transmitted from an AMCC QT2225 dual 10GBase-KR PHY IC and sent across the 1-m copper channel in a Molex GbX I-Trac backplane. The result, say the companies, is a complete end-to-end 10-Gbits/sec solution (server-to-backplane-to-server) with streaming video as the high-bandwidth application. This marks one of the first technological partnerships to carry out a simulation relevant to the emerging IEEE 802.3ap 10-Gigabit Ethernet standard. The Molex GbX I-Trac system is designed to offer excellent impedance control, low crosstalk and high overall bandwidth. Featuring an open pin-field design, Molex says the system gives engineers the flexibility to assign high-speed differential pairs, low-speed signals, and power and ground contacts anywhere within the pin-field. The QT2225 is a low-power, dual-port XAUI-to-10GBase-KR PHY IC designed for transmission of serial 10 Gbits/sec Ethernet traffic over 1m of PCB/backplane. It includes integrated IEEE 802.3ap FEC with bypass and can operate in both 10GBase-KR and 1000Base-KX modes. According to Gilles Garcia, director of marketing at AMCC, “We can offer a capacity increase of 4 to 10 channels per port to customers moving to 10 Gbits/sec Ethernet for backplane connectivity. The maturity of this technology and applications will accelerate the adoption in enterprise data centers for server-to-server communication and blade server platforms.”
Pair-testing highlights Serial Attached SCSI plugfest
The SCSI Trade Association (STA; www.scsita.org), an industry association established to promote SCSI technology, held a 6 Gbits/sec Serial Attached SCSI (SAS) plugfest Nov. 10-14 at the University of New Hampshire InterOperability Laboratory (www.iol.unh.edu). Tests included an open plugfest environment that allowed participants to interconnect and test for interoperability and compatibility; extensive pair-testing to prove compatibility between any two vendors; pair-testing that allowed vendors the time to vary the parameters to test for margin levels; and standard as well as active cables tested at longer lengths. Mike Fitzpatrick, senior research executive for Fujitsu Computer Products of America and chairman of the SAS Plugfest Technical Committee, commented, “The large-system build was a critical test of 6 Gbits/sec SAS functionality and interoperability. It allowed new 6 Gbits/sec SAS products, as well as legacy products to be tested in environments with many other SAS components and new test equipment. New-generation devices underwent significant physical layer testing. CS
